GEWLSENWASSER: symbol, component, RV.adcChannel and Div.flowMtrNr4Cmd, ROMA_200: route bit 80 fixed.

RegulValve.adcChannel and Diverter.flowMtrNr4Cmd for GELSENWASSER
This commit is contained in:
Milan Hanajik 2020-03-02 09:00:24 +01:00
parent 329ffeca8f
commit bd15d3bd83
13 changed files with 50 additions and 21 deletions

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@ -56,7 +56,7 @@ namespace Config
public const int CompoundWMsCount = 1; public const int CompoundWMsCount = 1;
public const int HeatMetersCount = 0; public const int HeatMetersCount = 0;
public const int MaxPartNr = WMsCount / LineSize; public const int MaxPartNr = WMsCount / LineSize;
#elif TORINO_50 || BADGER_MALA_TRAT || BERLIN #elif TORINO_50 || BADGER_MALA_TRAT || BERLIN || GELSENWASSER
public const int WMsCount = 6; public const int WMsCount = 6;
public const int LineSize = 6; public const int LineSize = 6;
public const int CompoundWMsCount = 1; public const int CompoundWMsCount = 1;

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@ -32,5 +32,5 @@ using System.Runtime.InteropServices;
// You can specify all the values or you can default the Build and Revision Numbers // You can specify all the values or you can default the Build and Revision Numbers
// by using the '*' as shown below: // by using the '*' as shown below:
// [assembly: AssemblyVersion("1.0.*")] // [assembly: AssemblyVersion("1.0.*")]
[assembly: AssemblyVersion("2.25.1400.0")] [assembly: AssemblyVersion("2.25.1427.0")]
[assembly: AssemblyFileVersion("2.25.1400.0")] [assembly: AssemblyFileVersion("2.25.1427.0")]

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@ -32,5 +32,5 @@ using System.Runtime.InteropServices;
// You can specify all the values or you can default the Build and Revision Numbers // You can specify all the values or you can default the Build and Revision Numbers
// by using the '*' as shown below: // by using the '*' as shown below:
// [assembly: AssemblyVersion("1.0.*")] // [assembly: AssemblyVersion("1.0.*")]
[assembly: AssemblyVersion("2.25.1409.0")] [assembly: AssemblyVersion("2.25.1427.0")]
[assembly: AssemblyFileVersion("2.25.1409.0")] [assembly: AssemblyFileVersion("2.25.1427.0")]

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@ -19,7 +19,7 @@ namespace TBF.BenchControl.Elde
EnduranceCycleStop = 13, EnduranceCycleStop = 13,
} }
#if FUZHOU_300 || IZRAEL_200 || TORINO_50 || BADGER_MALA_TRAT || BADGER_STREDNA_TRAT || TURA_IPERL || TURA_IPERL_NEW || TURA_SPECIAL || BADGER_VELKA_TRAT || PUCHONG_200 || SLM_50 || GENESIS || MALTA_WSD25 || SLM_END || WARSAW_END || BERLIN || SLM_150 || PETERSBURG_50 || PETERSBURG_200 || DEWA_300 || ROMA_200 || KEMPNO_50 || BAHRAIN_50 || RUM_MOB || KRAKOW_50 || JUZNA_AFRIKA_50 || IZRAEL_25 || ZAMBIA || ZODINO || FEWA_50 || FILIPINY_50 || SENTEC || FUZHOU_100 || CEVAK_200 || IZRAEL_50 || ALZIR_25 #if FUZHOU_300 || IZRAEL_200 || TORINO_50 || BADGER_MALA_TRAT || BADGER_STREDNA_TRAT || TURA_IPERL || TURA_IPERL_NEW || TURA_SPECIAL || BADGER_VELKA_TRAT || PUCHONG_200 || SLM_50 || GENESIS || MALTA_WSD25 || SLM_END || WARSAW_END || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_50 || PETERSBURG_200 || DEWA_300 || ROMA_200 || KEMPNO_50 || BAHRAIN_50 || RUM_MOB || KRAKOW_50 || JUZNA_AFRIKA_50 || IZRAEL_25 || ZAMBIA || ZODINO || FEWA_50 || FILIPINY_50 || SENTEC || FUZHOU_100 || CEVAK_200 || IZRAEL_50 || ALZIR_25
public enum StatusP : ulong public enum StatusP : ulong
{ {
RefFlowMeterMask = 0x7, /// bits 0,1,2 RefFlowMeterMask = 0x7, /// bits 0,1,2

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@ -114,7 +114,7 @@ namespace TBF.BenchControl.Elde
public uint[,] RegValveCalib = new uint[8,2] {{100,500},{100,500},{100,500},{100,500},{100,500},{100,500},{100,500},{100,500}}; public uint[,] RegValveCalib = new uint[8,2] {{100,500},{100,500},{100,500},{100,500},{100,500},{100,500},{100,500},{100,500}};
public byte[] MeretRS485Address = new byte[4]; public byte[] MeretRS485Address = new byte[4];
public float[] EtCalib = new float[6] { 1, 1, 1, 1, 1, 1 }; public float[] EtCalib = new float[6] { 1, 1, 1, 1, 1, 1 };
#elif PUCHONG_200 || GENESIS || BERLIN || PETERSBURG_200 || RUM_MOB #elif PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || PETERSBURG_200 || RUM_MOB
public uint[,] RegValveCalib = new uint[16, 2] { {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, public uint[,] RegValveCalib = new uint[16, 2] { {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500},
{100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500} }; {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500}, {100,500} };
public byte[] MeretRS485Address = new byte[4]; public byte[] MeretRS485Address = new byte[4];
@ -315,7 +315,7 @@ namespace TBF.BenchControl.Elde
ControlComponent3Munich.UserControl1 ctrlBrdComponent, ControlComponent3Munich.UserControl1 ctrlBrdComponent,
#elif FUZHOU_300 #elif FUZHOU_300
ControlComponent3F300.UserControl1 ctrlBrdComponent, ControlComponent3F300.UserControl1 ctrlBrdComponent,
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || SLM_150 || PETERSBURG_200 #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_200
ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent, ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent,
#else /// all newer benches #else /// all newer benches
ControlComponent_Torino2015.UserControl1 ctrlBrdComponent, ControlComponent_Torino2015.UserControl1 ctrlBrdComponent,

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@ -74,13 +74,13 @@ namespace TBF.BenchControl.Elde
public float Pressure(int prsNr0) { return ctrlBrdComponent.pressure[prsNr0]; } public float Pressure(int prsNr0) { return ctrlBrdComponent.pressure[prsNr0]; }
public float Temperature(int tmpNr0) { return (tmpNr0 >= 0 && tmpNr0 < ctrlBrdComponent.temperature.Length) ? ctrlBrdComponent.temperature[tmpNr0] : 0; } public float Temperature(int tmpNr0) { return (tmpNr0 >= 0 && tmpNr0 < ctrlBrdComponent.temperature.Length) ? ctrlBrdComponent.temperature[tmpNr0] : 0; }
public RegulValveState RegulValveState(int rvNr1) { return (RegulValveState)ctrlBrdComponent.rValveStatus[rvNr1 - 1]; } public RegulValveState RegulValveState(int rvNr1) { return (RegulValveState)ctrlBrdComponent.rValveStatus[rvNr1 - 1]; }
#if GENESIS || BERLIN || PETERSBURG_200 || DEWA_300 || ROMA_200 #if GENESIS || BERLIN || GELSENWASSER || PETERSBURG_200 || DEWA_300 || ROMA_200
public UInt128 RRoute { get { return ((UInt128)ctrlBrdComponent.rRouteH << 64) | (UInt128)ctrlBrdComponent.rRoute; } } public UInt128 RRoute { get { return ((UInt128)ctrlBrdComponent.rRouteH << 64) | (UInt128)ctrlBrdComponent.rRoute; } }
#else #else
public UInt128 RRoute { get { return ctrlBrdComponent.rRoute; } } public UInt128 RRoute { get { return ctrlBrdComponent.rRoute; } }
#endif #endif
#if GENESIS || KEMPNO_50 || KRAKOW_50 || BAHRAIN_50 || BADGER_STREDNA_TRAT || JUZNA_AFRIKA_50 || IZRAEL_25 || ZAMBIA || ZODINO || FEWA_50 || FILIPINY_50 || SENTEC || FUZHOU_100 || CEVAK_200 || IZRAEL_50 || DEWA_300 || ROMA_200 || PUCHONG_200 || TURA_IPERL_NEW || ALZIR_25 #if GENESIS || KEMPNO_50 || KRAKOW_50 || BAHRAIN_50 || BADGER_STREDNA_TRAT || JUZNA_AFRIKA_50 || IZRAEL_25 || ZAMBIA || ZODINO || FEWA_50 || FILIPINY_50 || SENTEC || FUZHOU_100 || CEVAK_200 || IZRAEL_50 || DEWA_300 || ROMA_200 || PUCHONG_200 || TURA_IPERL_NEW || ALZIR_25 || GELSENWASSER
public uint DivTime(int id) { return ctrlBrdComponent.divTime[id]; } public uint DivTime(int id) { return ctrlBrdComponent.divTime[id]; }
public void SetDivLimit(int divNo, uint limLoPct, uint limHiPct) public void SetDivLimit(int divNo, uint limLoPct, uint limHiPct)
{ {
@ -176,7 +176,7 @@ namespace TBF.BenchControl.Elde
private ControlComponent3Munich.UserControl1 ctrlBrdComponent; private ControlComponent3Munich.UserControl1 ctrlBrdComponent;
#elif FUZHOU_300 #elif FUZHOU_300
private ControlComponent3F300.UserControl1 ctrlBrdComponent; private ControlComponent3F300.UserControl1 ctrlBrdComponent;
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || SLM_150 || PETERSBURG_200 #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_200
private ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent; private ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent;
#else /// newer benches #else /// newer benches
private ControlComponent_Torino2015.UserControl1 ctrlBrdComponent; private ControlComponent_Torino2015.UserControl1 ctrlBrdComponent;
@ -192,7 +192,7 @@ namespace TBF.BenchControl.Elde
public ControlComWrap(ControlComponent3Munich.UserControl1 ctrlBrdComponent) public ControlComWrap(ControlComponent3Munich.UserControl1 ctrlBrdComponent)
#elif FUZHOU_300 #elif FUZHOU_300
public ControlComWrap(ControlComponent3F300.UserControl1 ctrlBrdComponent) public ControlComWrap(ControlComponent3F300.UserControl1 ctrlBrdComponent)
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || SLM_150 || PETERSBURG_200 #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_200
public ControlComWrap(ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent) public ControlComWrap(ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent)
#else /// all newer benches #else /// all newer benches
public ControlComWrap(ControlComponent_Torino2015.UserControl1 ctrlBrdComponent) public ControlComWrap(ControlComponent_Torino2015.UserControl1 ctrlBrdComponent)
@ -243,7 +243,7 @@ namespace TBF.BenchControl.Elde
log.FatalFormat("Component: {0}", ControlComponent3Munich.UserControl1.ProgVersion); log.FatalFormat("Component: {0}", ControlComponent3Munich.UserControl1.ProgVersion);
#elif FUZHOU_300 #elif FUZHOU_300
log.FatalFormat("Component: {0}", ControlComponent3F300.UserControl1.ProgVersion); log.FatalFormat("Component: {0}", ControlComponent3F300.UserControl1.ProgVersion);
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || SLM_150 || PETERSBURG_200 #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_200
log.FatalFormat("Component: {0}", ControlComponent_Izrael2014.UserControl1.ProgVersion); log.FatalFormat("Component: {0}", ControlComponent_Izrael2014.UserControl1.ProgVersion);
#else /// newer benches #else /// newer benches
log.FatalFormat("Component: {0}", ControlComponent_Torino2015.UserControl1.ProgVersion); log.FatalFormat("Component: {0}", ControlComponent_Torino2015.UserControl1.ProgVersion);
@ -343,7 +343,7 @@ namespace TBF.BenchControl.Elde
bool bit39 = (route & 0x00FC000000000000) != 0; /// true if any of bits 50 through 55 is set bool bit39 = (route & 0x00FC000000000000) != 0; /// true if any of bits 50 through 55 is set
route = route & 0xFF03FFFFFFFFFFFF; route = route & 0xFF03FFFFFFFFFFFF;
if (bit39) route = route | 0x0000008000000000; if (bit39) route = route | 0x0000008000000000;
#elif PETERSBURG_200 || ROMA_200 #elif PETERSBURG_200
/// ///
/// The following code deals with the situation that all pumps share bit #80. /// The following code deals with the situation that all pumps share bit #80.
/// In settings the bits of pumps should be sent as follows: P1=64, P2=65, P3=66, P4=67 and P5=68 /// In settings the bits of pumps should be sent as follows: P1=64, P2=65, P3=66, P4=67 and P5=68
@ -374,6 +374,9 @@ namespace TBF.BenchControl.Elde
sendCommandArgs.StopDevs); /// 15 sendCommandArgs.StopDevs); /// 15
#if DN100 || MUNICH #if DN100 || MUNICH
///
/// 64-bit route, single pump FM frequency (no array), single filter conts. (no array)
///
ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd, ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd,
(byte)sendCommandArgs.RefFlowmtrNr, (byte)sendCommandArgs.RefFlowmtrNr,
(ulong)route, (ulong)route,
@ -385,6 +388,9 @@ namespace TBF.BenchControl.Elde
(uint)shortImp, (uint)shortImp,
(uint)sendCommandArgs.StopDevs); (uint)sendCommandArgs.StopDevs);
#elif BADGER_MALA_TRAT || BADGER_VELKA_TRAT || FUZHOU_50 || FUZHOU_150 || FUZHOU_300 || IZRAEL_200 || TORINO_50 || TORUN_50 || CEVAK_40 || MURES_40 #elif BADGER_MALA_TRAT || BADGER_VELKA_TRAT || FUZHOU_50 || FUZHOU_150 || FUZHOU_300 || IZRAEL_200 || TORINO_50 || TORUN_50 || CEVAK_40 || MURES_40
///
/// 64-bit route, single filter conts. (no array)
///
ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd, ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd,
(byte)sendCommandArgs.RefFlowmtrNr, (byte)sendCommandArgs.RefFlowmtrNr,
(ulong)route, (ulong)route,
@ -396,6 +402,9 @@ namespace TBF.BenchControl.Elde
(uint)shortImp, (uint)shortImp,
(uint)sendCommandArgs.StopDevs); (uint)sendCommandArgs.StopDevs);
#elif BERLIN || SLM_150 || PETERSBURG_200 #elif BERLIN || SLM_150 || PETERSBURG_200
///
/// 128-bit route, prolonged method support, single filter conts. (no array)
///
ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd, ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd,
(byte)sendCommandArgs.RefFlowmtrNr, (byte)sendCommandArgs.RefFlowmtrNr,
(ulong)(route & (UInt128)0xFFFFFFFFFFFFFFFF), (ulong)(route & (UInt128)0xFFFFFFFFFFFFFFFF),
@ -407,7 +416,10 @@ namespace TBF.BenchControl.Elde
(uint)regConst, (uint)regConst,
(uint)shortImp, (uint)shortImp,
(uint)sendCommandArgs.StopDevs); (uint)sendCommandArgs.StopDevs);
#elif GENESIS || DEWA_300 || ROMA_200 #elif GENESIS || DEWA_300 || ROMA_200 || GELSENWASSER
///
/// 128-bit route, prolonged method support
///
ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd, ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd,
(byte)sendCommandArgs.RefFlowmtrNr, (byte)sendCommandArgs.RefFlowmtrNr,
(ulong)(route & (UInt128)0xFFFFFFFFFFFFFFFF), (ulong)(route & (UInt128)0xFFFFFFFFFFFFFFFF),
@ -420,6 +432,9 @@ namespace TBF.BenchControl.Elde
(uint)shortImp, (uint)shortImp,
(uint)sendCommandArgs.StopDevs); (uint)sendCommandArgs.StopDevs);
#elif JUZNA_AFRIKA_50 || IZRAEL_25 || ZAMBIA || ZODINO || FEWA_50 || FILIPINY_50 || SENTEC || FUZHOU_100 || CEVAK_200 || IZRAEL_50 || ALZIR_25 #elif JUZNA_AFRIKA_50 || IZRAEL_25 || ZAMBIA || ZODINO || FEWA_50 || FILIPINY_50 || SENTEC || FUZHOU_100 || CEVAK_200 || IZRAEL_50 || ALZIR_25
///
/// 64-bit route, prolonged method support
///
ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd, ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd,
(byte)sendCommandArgs.RefFlowmtrNr, (byte)sendCommandArgs.RefFlowmtrNr,
(ulong)route, (ulong)route,
@ -431,6 +446,9 @@ namespace TBF.BenchControl.Elde
(uint)shortImp, (uint)shortImp,
(uint)sendCommandArgs.StopDevs); (uint)sendCommandArgs.StopDevs);
#else /// if TURA_IPERL || TURA_IPERL_NEW || TURA_SPECIAL || MALTA_WSD25 || SLM_50 || SLM_END || WARSAW_END || PETERSBURG_50 || KEMPNO_50 || BAHRAIN_50 || RUM_MOB || KRAKOW_50 || BADGER_STREDNA_TRAT || PUCHONG_200 #else /// if TURA_IPERL || TURA_IPERL_NEW || TURA_SPECIAL || MALTA_WSD25 || SLM_50 || SLM_END || WARSAW_END || PETERSBURG_50 || KEMPNO_50 || BAHRAIN_50 || RUM_MOB || KRAKOW_50 || BADGER_STREDNA_TRAT || PUCHONG_200
///
/// 64-bit route, prolonged method support, single filter conts. (no array)
///
ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd, ctrlBrdComponent.SendCommand((uint)sendCommandArgs.Cmd,
(byte)sendCommandArgs.RefFlowmtrNr, (byte)sendCommandArgs.RefFlowmtrNr,
(ulong)route, (ulong)route,

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@ -129,6 +129,15 @@ namespace TBF.BenchControl.Elde.Diverter
flowMtrNr4Cmd = divNrFromName + 16 * divNrFromName; flowMtrNr4Cmd = divNrFromName + 16 * divNrFromName;
#elif FILIPINY_50 #elif FILIPINY_50
flowMtrNr4Cmd = (divNrFromName == 1) ? 1 : 7; flowMtrNr4Cmd = (divNrFromName == 1) ? 1 : 7;
#elif GELSENWASSER
switch (divNrFromName)
{
default:
case 1: flowMtrNr4Cmd = 1; break;
case 2: flowMtrNr4Cmd = 2; break;
case 3: flowMtrNr4Cmd = 3; break;
case 4: flowMtrNr4Cmd = 5; break;
}
#else #else
flowMtrNr4Cmd = (divNrFromName == 1) ? 1 : 3; flowMtrNr4Cmd = (divNrFromName == 1) ? 1 : 3;
#endif #endif

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@ -103,6 +103,8 @@ namespace TBF.BenchControl.Elde.RegulValve
adcChannel = (Idx1 < 3) ? (Idx1 - 1) : (Idx1 - 2); adcChannel = (Idx1 < 3) ? (Idx1 - 1) : (Idx1 - 2);
#elif CEVAK_200 #elif CEVAK_200
adcChannel = Math.Max(Idx1 - 3, 0); adcChannel = Math.Max(Idx1 - 3, 0);
#elif GELSENWASSER
adcChannel = Idx1 - 2;
#else #else
adcChannel = Idx1 - 1; adcChannel = Idx1 - 1;
#endif #endif

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@ -204,7 +204,7 @@ namespace TBF.BenchControl
public static void InitializeBoardEtc(ControlComponent3Munich.UserControl1 ctrlBrdComponent) public static void InitializeBoardEtc(ControlComponent3Munich.UserControl1 ctrlBrdComponent)
#elif FUZHOU_300 #elif FUZHOU_300
public static void InitializeBoardEtc(ControlComponent3F300.UserControl1 ctrlBrdComponent) public static void InitializeBoardEtc(ControlComponent3F300.UserControl1 ctrlBrdComponent)
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || SLM_150 || PETERSBURG_200 #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_200
public static void InitializeBoardEtc(ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent) public static void InitializeBoardEtc(ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent)
#else /// all newer benches #else /// all newer benches
public static void InitializeBoardEtc(ControlComponent_Torino2015.UserControl1 ctrlBrdComponent) public static void InitializeBoardEtc(ControlComponent_Torino2015.UserControl1 ctrlBrdComponent)

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@ -219,7 +219,7 @@ namespace TBF.BenchControl
const ulong Path3 = VL12 | VI31 | VI32; const ulong Path3 = VL12 | VI31 | VI32;
const ulong Path4 = VL12 | VI41 | VI42; const ulong Path4 = VL12 | VI41 | VI42;
const ulong Path5 = VL12 | VI41 | VI43; const ulong Path5 = VL12 | VI41 | VI43;
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER
const ulong VM11 = (1L << 4); const ulong VM11 = (1L << 4);
const ulong VM12 = (1L << 5); const ulong VM12 = (1L << 5);
const ulong VM21 = (1L << 6); const ulong VM21 = (1L << 6);
@ -505,7 +505,7 @@ namespace TBF.BenchControl
if (Div2sim && (SimRoute & Path3) == Path3) Mass2sim += DiffKg(Flow3sim, time); if (Div2sim && (SimRoute & Path3) == Path3) Mass2sim += DiffKg(Flow3sim, time);
if (Div2sim && (SimRoute & Path4) == Path4) Mass2sim += DiffKg(Flow4sim, time); if (Div2sim && (SimRoute & Path4) == Path4) Mass2sim += DiffKg(Flow4sim, time);
if (Div1sim && (SimRoute & Path5) == Path5) Mass1sim += DiffKg(Flow5sim, time); if (Div1sim && (SimRoute & Path5) == Path5) Mass1sim += DiffKg(Flow5sim, time);
#elif MUNICH || FUZHOU_150 || FUZHOU_300 || IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN #elif MUNICH || FUZHOU_150 || FUZHOU_300 || IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER
if (Div1sim && (SimRoute & Path1) == Path1) if (Div1sim && (SimRoute & Path1) == Path1)
{ {
double diff = DiffKg(Flow1sim, time); double diff = DiffKg(Flow1sim, time);
@ -636,7 +636,7 @@ namespace TBF.BenchControl
if (toTank) { throw (new Exception()); } if (toTank) { throw (new Exception()); }
break; break;
} }
#elif MUNICH || FUZHOU_150 || FUZHOU_300 || IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN #elif MUNICH || FUZHOU_150 || FUZHOU_300 || IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER
switch (regulValveNo) switch (regulValveNo)
{ {
case 1: case 1:

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@ -150,7 +150,7 @@ namespace TBF.BenchControl.TestMethods.DiverterTest
/// ///
if (drainTheTank) if (drainTheTank)
{ {
#if BERLIN || SENTEC #if BERLIN || GELSENWASSER || SENTEC
switch (DrainTheTank(outPath.Scale, readTempPressOps)) switch (DrainTheTank(outPath.Scale, readTempPressOps))
{ {
case Event.Error: { retVal = Event.Error; goto stopTest; } case Event.Error: { retVal = Event.Error; goto stopTest; }

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@ -710,7 +710,7 @@ namespace TBF.UI
#elif FUZHOU_300 #elif FUZHOU_300
private ControlComponent3F300.UserControl1 ctrlBrdComponent; private ControlComponent3F300.UserControl1 ctrlBrdComponent;
private TBF.UI.Process.ProcessTabPageCtrl6 processTabPageCtrl; private TBF.UI.Process.ProcessTabPageCtrl6 processTabPageCtrl;
#elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || SLM_150 || PETERSBURG_200 #elif IZRAEL_200 || PUCHONG_200 || GENESIS || BERLIN || GELSENWASSER || SLM_150 || PETERSBURG_200
private ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent; private ControlComponent_Izrael2014.UserControl1 ctrlBrdComponent;
private TBF.UI.Process.ProcessTabPageCtrl6 processTabPageCtrl; private TBF.UI.Process.ProcessTabPageCtrl6 processTabPageCtrl;
#elif BADGER_MALA_TRAT || BADGER_STREDNA_TRAT || BADGER_VELKA_TRAT || SLM_END || WARSAW_END || RUM_MOB || SENTEC || CEVAK_200 #elif BADGER_MALA_TRAT || BADGER_STREDNA_TRAT || BADGER_VELKA_TRAT || SLM_END || WARSAW_END || RUM_MOB || SENTEC || CEVAK_200